Renesas TW8836-LB2-CE

TW8836-LB2-CE 概要

The TW8836 is a highly integrated LCD video processor that incorporates many of the features required to create a multipurpose LCD display system into a single package. This includes a high quality, 2D comb NTSC/PAL/SECAM video decoder, triple high-speed RGB ADCs, an LVDS and TTL digital input interface, a high-quality scaler and deinterlacer, and a versatile OSD, with a high-performance output panel interface for MCU and LVDS or TTL.

The TW8836 can support input resolutions up to 1080p and can drive LCD panels at resolutions up to 1366 x768. The TW8836's video processing capability includes arbitrary H/V scaling, panoramic scaling, image mirroring, image adjustment and enhancement, and black and white stretch. The feature set and versatility of this device makes it an ideal solution for in-car LCD display applications and portable display applications such as pico projectors.

特徴

• Analog Video Decoder
  • NTSC (M, 4.43) and PAL (B, D, G, H, I, M, N, N combination), PAL (60), SECAM with automatic format detection
  • Three 10-bit ADCs and analog clamping circuit
  • Fully programmable static gain or automatic gain control for the Y or CVBS channel
  • Programmable white peak control for the Y or CVBS channel
  • Software selectable analog inputs allow composite, S-video, analog YPbPr, or RGB
  • High quality adaptive 2D comb filter for NTSC/PAL inputs
  • PAL delay line for color phase error correction
  • Image enhancement with 2D dynamic peaking/CTI
  • Digital subcarrier PLL for accurate color decoding
  • Programmable hue, brightness, saturation, contrast, sharpness
  • Selectable differential or single-ended CVBS input
  • Digital horizontal PLL and advanced synchronization processing for VCR playback and weak signal performance
  • High quality horizontal and vertical filtered-down scaling with arbitrary scale-down ratio
  • Up to 2CH differential or 4CH single-ended CVBS input
  • Supports detection of Macrovision copy protection
• Analog RGB Inputs
  • Triple high-speed 10-bit ADCs with clamping and programmable gain amplifier
  • SOG and H/VSYNC support for YPbPr or RGB input
  • Built-in line locked PLL with sync separator
  • Supports input resolutions VGA (25MHz) to 1080p (150MHz)
• Digital Inputs Support
  • Supports both BT.656 and 601 video formats
  • Supports YCbCr/RGB 24-bit, VGA (25MHz) to 1080p (150MHz) resolution
  • Single channel LVDS input, from VGA (25 MHz) up to 720p (75 MHz) resolution
  • Supports RGB 565 + BT.656 at the same time
• TFT Panel Support
  • Built-in programmable timing controller
  • Supports 3, 4, 6, or 8 bits per pixel up to 16.8 million colors with built-in dithering engine
  • Supports digital panels (TTL) or single channel LVDS panels up to WXGA (1366 x768) resolution, 85MHz
  • Supports serial (8-bit) RGB panel
• Font Based On-Screen Display
  • Eight window font OSD with bordering/shadow
  • 10kB programmable font RAM and 512 display RAM
  • 1/2/3/4 bits/pixels
  • Supports variable width (12/16), height (2~32)
• SPI Flash Based On-Screen Display
  • Nine bitmap based OSD windows in two layers through SPI with alpha blending between layers
  • Supports 4/6/8 bits/pixels
  • Supports RLE decompression for two windows
• Image Processing
  • High-quality scaler with both up/down and panorama/water-glass scaling support
  • Built-in 2D deinterlacing function
  • Programmable brightness, contrast, saturation, hue, and sharpness
  • Programmable color transient improvement control
  • Supports programmable cropping of input video and graphics
  • Independent RGB gain and offset controls
  • DTV hue adjustment
  • Programmable 8-bit gamma correction for each color
  • Black/white stretch
• Clock Generation
  • Spread spectrum profile based on triangular modulation with center spread
  • Programmable modulation frequency and spread width
• Timing Controller (TCON)
  • Supports programmable interface signals for control
  • Column (source) driver/row (gate) driver
• MCU
  • Industry-standard 8052 based
  • Code fetch from external SPI flash memory
  • 256B code cache
  • 2k XDATA memory
  • Supports power save mode with 32k internal clock
  • ISP (In System Programming) through I²C
  • Supports 24-bit addressing

仕様