Microchip ATSAMD51J19A-AU

ATSAMD51J19A-AU 概要

With a focus on security and efficiency, the ATSAMD51J19A-AU microcontroller is equipped with advanced features such as secure boot loader, secure key storage, and tamper detection capabilities to protect against unauthorized access and data theft. Its wide voltage range and low power consumption make it suitable for battery-powered applications, ensuring reliable and long-lasting performance. Whether it's for industrial automation, smart home devices, or automotive systems, this microcontroller is a dependable choice for demanding embedded applications

特徴

• Processor
• ARM Cortex-M4F CPU running at up to 120 MHz
• Floating Point Unit (FPU)
• Embedded Trace Module (ETM) with instruction trace stream
• Core Sight Embedded Trace Buffer (ETB)
• Memories
• 512 KB in-system self-programmable Flash with:
• Error Correction Code (ECC)
• Dual bank with Read-While-Write (RWW) support
• EEPROM hardware emulation
• 192 KB SRAM Main Memory
• Error Correction Code (ECC) RAM option
• Up to 4 KB of Tightly Coupled Memory (TCM)
• Up to 8 KB additional SRAM with backup retention capability
• System
• Power-on Reset (POR) and Brown-out detection (BOD)
• Internal and external clock options
• External Interrupt Controller (EIC)
• Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface
• Power Performance
• Five Low Power Modes (Idle, Standby, Hibernate, Backup, and Off )
• Sleep Walking peripherals.
• Battery backup support
• Embedded Buck/LDO regulator supporting on-the-fly selection.
• 65µA/MHz active power consumption.
• Integrated Security Features
• One Advanced Encryption System (AES) with 256-bit key length and up to 2 MB/s data rate
• Five confidential modes of operation (ECB, CBC, CFB, OFB, CTR)
• True Random Number Generator (TRNG)
• Public Key Cryptography Controller (PUKCC) and associated Classical Public Key Cryptography Library (PUKCL)
• RSA, DSA
• Elliptic Curves Cryptography (ECC) ECC GF(2n), ECC GF(p)
• Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA
• Peripherals
• 32-channel Direct Memory Access Controller (DMAC)
• One  SD(HC) Memory Card Interfaces (SDHC)
• Compatibility with SD and SDHC Memory Card Specification Version 3.01
• Compatibility with SDIO Specification Version 3.0
• Compliant with JDEC specification, MMC memory cards V4.51
• One Quad I/O Serial Peripheral Interface (QSPI)
• eXecute-In-Place (XIP) support
• Up to 75 MHz SDR operation and DDR support
• One Full-Speed (12 Mbps) Universal Serial Bus (USB) 2.0 interface
• Embedded host and device function
• Six Serial Communication Interfaces (SERCOM), each configurable to operate as either:
• USART with full-duplex and single-wire half-duplex configuration
• ISO7816
• I2C up to 3.4MHz
• SPI
• LIN master/slave
• RS485
• SPI inter-byte space
• One two-channel Inter-IC Sound Interface (I2S)
• Parallel Capture Controller (PCC)
• Peripheral Touch Controller (PTC)
• System Features:
• 32-channel Event System
• Up to Six 16-bit Timers/Counters (TC) each configurable as:
• 16-bit ,32-bit or 8-bit TC with two compare/capture channels
• 32-bit Real Time Counter (RTC) with clock/calendar function
• Up to 5 wake-up pins with tamper detection and de-bouncing filter
• Watchdog Timer (WDT) with Window mode
• CRC-32 generator
• Position Decoder (PDEC)
• Frequency meter (FREQM)
• One Configurable Custom Logic (CCL)
• Dual 12-bit, 1 MSPS Analog-to-Digital Converter (ADC) with up to 16 channels each
• Differential and single-ended input
• Automatic offset and gain error compensation
• Oversampling and decimation in hardware to support 13-, 14-, 15-, or 16-bit resolution
• Dual 12-bit, 1 MSPS Output Digital-to-Analog Converter (DAC)
• One temperature sensor
• I/O Pins
• 51  programmable I/O pins
• Operating Voltage
• 1.71V – 3.6V
• Packages
• 64-pin QFN,TQFP,WLCSP

仕様